Improved competitive performance bounds for CIOQ switches

Abstract Combined Input and Output Queued (CIOQ) architectures with a moderate fabric speedup S > 1 have come to play a major role in the design of high performance switches. In this paper we study CIOQ switches with First-In-First-Out (FIFO) buffers providing Quality of Service (QoS) guarantees. The goal of the switch policy is to maximize the total value of packets sent out of the switch.We analyze the performance of a switch policy by means of competitive analysis, where a uniform worst-case performance guarantee is provided for all traffic patterns. Azar and Richter (ACM Trans. Algorithms 2(2):282-295, 2006) proposed the β-PG algorithm (Preemptive Greedy with a preemption factor of β) that is 8-competitive for an arbitrary speedup value when β = 3. We improve upon their result by showing that this algorithm achieves a competitive ratio of 7.5 and 7.47 for β = 3 and β = 2.8, respectively. Basically, we demonstrate that β-PG is at most ^β2+2β _β-1 and at least ^β2 _β-1 -competitive.