Ultra-fast measurements of VTH instability in SiC MOSFETs due to positive and negative constant bias stress

M. Gurfinkel, J. Suehle, J. B. Bernstein, Y. Shapira, A. J. Lelis, D. Habersat, N. Goldsman

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

12 Scopus citations

Abstract

One of the most important issues that limits the performance and reliability of SiC power MOSFETs is the threshold voltage instability under normal operation conditions. This phenomenon has been recently studied using dc sweep measurements. In this work, we studied the threshold voltage instability using fast I- V measurements. The results show that under positive bias, V TH shifts to more positive values, while it shifts to more negative values under negative bias. Fast I- V measurements reveal the full extent of the VTH instability, underestimated by the dc measurements. Furthermore, fast measurements allow the separation of negative and positive bias stress effects. A physical model involving fast transient charge trapping and de-trapping at and near the SiC/SiO2 interface is proposed.

Original languageEnglish
Title of host publication2006 IEEE International Integrated Reliability Workshop Final Report, IIRW
Pages49-53
Number of pages5
DOIs
StatePublished - 2006
Externally publishedYes
Event2006 IEEE International Integrated Reliability Workshop Final Report, IIRW - South Lake Tahoe, CA, United States
Duration: 16 Oct 200619 Oct 2006

Publication series

NameIEEE International Integrated Reliability Workshop Final Report

Conference

Conference2006 IEEE International Integrated Reliability Workshop Final Report, IIRW
Country/TerritoryUnited States
CitySouth Lake Tahoe, CA
Period16/10/0619/10/06

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