Abstract
An analysis methodology for charge pumping (CP) measurements was developed and applied to extract spatial distributions of traps in SiO2HfO2 gate stacks. This analysis indicates that the traps accessible by CP measurements in the frequency range down to a few kilohertz are located primarily within the SiO2 layer and HfO2 SiO2 interface region. The trap density in the SiO2 layer increases closer to the high-κ dielectric, while the trap spatial profile as a function of the distance from the high-κ film was found to be dependent on high-κ film characteristics. These results point to interactions with the high-κ dielectric as a cause of trap generation in the interfacial SiO2 layer.
Original language | English |
---|---|
Pages (from-to) | 1338-1345 |
Number of pages | 8 |
Journal | IEEE Transactions on Electron Devices |
Volume | 54 |
Issue number | 6 |
DOIs | |
State | Published - Jun 2007 |
Externally published | Yes |
Keywords
- Charge pumping
- High-κ dielectrics
- Interfacial layer
- Maximum depth
- Trap profile