Abstract
An experimental investigation of breakdown and defect generation under combined substrate hot-electron and tunneling electrical stress of silicon oxide ranging in thickness from 2.0 nm to 3.5 nm is reported. Using independent control of the gate current for a given substrate and gate bias, the time-to-breakdown of ultrathin silicon dioxide under substrate hot-electron stress is observed to be inversely proportional to the gate current density. The thickness dependence (2.0 nm to 3.5 nm) of substrate hot-electron reliability is reported and shown to be similar to constant voltage tunneling stress. The build-up of defects measured using stress-induced-leakage current and charge-pumping for both tunneling and substrate hot-electron stress is reported. Based on these and previous results, a model is proposed to explain the time-to-breakdown behavior of ultrathin oxide under simultaneous tunneling and substrate hot-electron stress. The results and model provide a coherent understanding for describing the reliability of ultrathin SiO2 under combined substrate hot-electron injection and constant voltage tunneling stress.
| Original language | English |
|---|---|
| Pages (from-to) | 1183-1191 |
| Number of pages | 9 |
| Journal | IEEE Transactions on Electron Devices |
| Volume | 47 |
| Issue number | 6 |
| DOIs | |
| State | Published - 2000 |
| Externally published | Yes |