Abstract
Negative bias temperature instability of pMOSFETs is studied. It is found that there is strong frequency dependence of the parameters shift. At a certain high frequency, the threshold voltage shift is only about half of that generated by dc stress. The possible sources of this dependence are explored. An empirical model is established based on the reduction of Fixed oxide charges. This model is further used to explain some observed phenomena.
Original language | English |
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Pages | 113-117 |
Number of pages | 5 |
State | Published - 2004 |
Externally published | Yes |
Event | 2004 IEEE International Integrated Reliability Workshop Final Report - S. Lake Tahoe, CA, United States Duration: 18 Oct 2004 → 21 Oct 2004 |
Conference
Conference | 2004 IEEE International Integrated Reliability Workshop Final Report |
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Country/Territory | United States |
City | S. Lake Tahoe, CA |
Period | 18/10/04 → 21/10/04 |
Keywords
- Interface traps
- Negative bias temperature instability
- Threshold voltage
- pMOSFETs