TY - JOUR
T1 - Laser energy limitation for buried metal cuts
AU - Bernstein, Joseph B.
AU - Hua, Yijia
AU - Zhang, Wei
PY - 1998/1
Y1 - 1998/1
N2 - Redundancy by laser cutting of polysilicon fuses has been used by the memory industry for many years. As the levels of metallization increase, it becomes more difficult and expensive to delete deeply buried polysilicon lines. Ideally, metal fuses will be cut exclusively. However, to achieve reliable metal line cutting, a wide process window has to be found that can cut buried metal lines. The upper energy limit has previously been thought to result from excess laser energy absorbed by the substrate. We show that another failure mode exists at energies below the threshold to cause substrate damage directly. The same laser pulse which ejects the passivation and removes the metal is also likely to crack the dielectric material below the metal. Molten metal then fills the crack and maintains an electrical short circuit, preventing the line from being disconnected.
AB - Redundancy by laser cutting of polysilicon fuses has been used by the memory industry for many years. As the levels of metallization increase, it becomes more difficult and expensive to delete deeply buried polysilicon lines. Ideally, metal fuses will be cut exclusively. However, to achieve reliable metal line cutting, a wide process window has to be found that can cut buried metal lines. The upper energy limit has previously been thought to result from excess laser energy absorbed by the substrate. We show that another failure mode exists at energies below the threshold to cause substrate damage directly. The same laser pulse which ejects the passivation and removes the metal is also likely to crack the dielectric material below the metal. Molten metal then fills the crack and maintains an electrical short circuit, preventing the line from being disconnected.
KW - Integrated circuit interconnections
KW - Laser materials-processing applications
UR - http://www.scopus.com/inward/record.url?scp=0031672293&partnerID=8YFLogxK
U2 - 10.1109/55.650334
DO - 10.1109/55.650334
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AN - SCOPUS:0031672293
SN - 0741-3106
VL - 19
SP - 4
EP - 6
JO - IEEE Electron Device Letters
JF - IEEE Electron Device Letters
IS - 1
ER -