TY - JOUR
T1 - Lifetime projection for BTI assuming non-constant power law exponent
AU - Bernstein, Joseph B.
N1 - Publisher Copyright:
© 2026 Elsevier Ltd.
PY - 2026/6
Y1 - 2026/6
N2 - Accurate projection of long-term parametric degradation remains a central challenge in modern microelectronics reliability. This is particularly true for advanced CMOS technologies operating with reduced voltage margins and high sustained temperature. Bias temperature instability (BTI) degradation is commonly described by a power-law time dependence, where the time exponent is typically assumed to be invariant when extracting acceleration parameters and projecting lifetime. This work shows that such an assumption can introduce internal inconsistency in lifetime modeling. First, we demonstrate that conventional log–log extraction is sensitive to early-time baseline uncertainty due to inherent noise and the very fast timescale of initial power-law degradation. This uncertain baseline value leads to a time exponent value, n, which may lead to some curvature in the log-time plot, distorting the extrapolated value of this empirical time exponent n. We introduce in this paper a linearization approach based on the reciprocal time exponent m = 1/n, thus reducing this sensitivity which provides a more stable extraction method independent of this baseline value. Second, analysis of published advanced-node datasets, including gate-all-around (GAA) technologies, shows that the time exponent n exhibits systematic dependence on stress conditions even after baseline consistent extraction is performed. Analytical reformulation reveals that conventional time-to-failure (TTF) extrapolation combining intrinsic voltage and temperature acceleration with variation in the time exponent n, leads to effective rather than intrinsic activation parameters. An exponent-consistent transformation using TTF n is shown here to decouple these effects and recover consistent acceleration behavior. The results indicate that careful treatment of the time exponent n becomes increasingly important for advanced nodes and high-utilization applications, while remaining fully compatible with existing physics-of-failure and mission-profile methodologies.
AB - Accurate projection of long-term parametric degradation remains a central challenge in modern microelectronics reliability. This is particularly true for advanced CMOS technologies operating with reduced voltage margins and high sustained temperature. Bias temperature instability (BTI) degradation is commonly described by a power-law time dependence, where the time exponent is typically assumed to be invariant when extracting acceleration parameters and projecting lifetime. This work shows that such an assumption can introduce internal inconsistency in lifetime modeling. First, we demonstrate that conventional log–log extraction is sensitive to early-time baseline uncertainty due to inherent noise and the very fast timescale of initial power-law degradation. This uncertain baseline value leads to a time exponent value, n, which may lead to some curvature in the log-time plot, distorting the extrapolated value of this empirical time exponent n. We introduce in this paper a linearization approach based on the reciprocal time exponent m = 1/n, thus reducing this sensitivity which provides a more stable extraction method independent of this baseline value. Second, analysis of published advanced-node datasets, including gate-all-around (GAA) technologies, shows that the time exponent n exhibits systematic dependence on stress conditions even after baseline consistent extraction is performed. Analytical reformulation reveals that conventional time-to-failure (TTF) extrapolation combining intrinsic voltage and temperature acceleration with variation in the time exponent n, leads to effective rather than intrinsic activation parameters. An exponent-consistent transformation using TTF n is shown here to decouple these effects and recover consistent acceleration behavior. The results indicate that careful treatment of the time exponent n becomes increasingly important for advanced nodes and high-utilization applications, while remaining fully compatible with existing physics-of-failure and mission-profile methodologies.
KW - Additive hazard
KW - BTI
KW - GAA silicon
KW - Lifetime extrapolation
KW - Multi-time-of-life (MTOL)
KW - NBTI
KW - Physics-of-failure (PoF)
KW - Reliability standards
KW - Semiconductor reliability
KW - TTF modeling
UR - https://www.scopus.com/pages/publications/105035797827
U2 - 10.1016/j.microrel.2026.116147
DO - 10.1016/j.microrel.2026.116147
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AN - SCOPUS:105035797827
SN - 0026-2714
VL - 181
JO - Microelectronics Reliability
JF - Microelectronics Reliability
M1 - 116147
ER -